1. Field of the Invention
Embodiments of the present invention generally relate to selective deposition on a substrate.
2. Description of the Related Art
As geometries of integrated circuits are reduced to enable faster integrated circuits, the need for highly selective deposition of films increases. Sometimes the geometries may be reduced so much that etching of masking layers may not be feasible. In such cases, selective deposition of masking layers is desirable so as to reduce the need for etching the masking layers.
In some situations, for example, a device (such as a memory or logic device), having undergone front-end processing, may have oxide regions and silicon regions formed on its front side. The oxide regions may require subsequent etching to form gates, vias, contact holes, or interconnect lines, while the silicon regions will need to be masked from the etchant. Typically, a polymer film may be deposited and then etched to form a masking layer over the silicon regions of the substrate. However, etching is sometimes not practicable when small geometries are involved. Therefore, there is a need to produce masked layers of polymer coatings directly on the substrate, in which the polymer is selectively deposited only on areas that need to be masked, so that etching of the polymer layer following deposition is not necessary. Ideally, certain regions may be covered by the polymer and other regions of the substrate may be left bare.